Students of BMIPL (Bio-Medical Image Processing Lab.) won five awards at NTIRE 2019 Challenges (http://www.vision.ee.ethz.ch/ntire19/) of CVPR (Computer Vision and Pattern Recognition, one of the top conferences in computer vision) under the supervision of Prof. Se Young Chun. Dongwon Park (MS program) won a Winner Award for NTIRE 2019 Challenge on Real Image Super-Resolution, a Runner-Up Award for NTIRE 2019 Challenge on Image

Journal title: IEEE Transactions on Industrial Electronics (2-yr IF: 7.050, 5-yr IF: 7.623, 5.00%, L1) Condition: Accepted Article title: Single-Stage Voltage Balancer with High-Frequency Isolation for Bipolar LVDC Distribution System Authors: Jun-Young Lee, Young-Pyo Cho, and Jee-Hoon Jung* Abstract Conventional voltage balancers for the bipolar low-voltage dc (LVDC) distribution system have been composed of multiple power stages, which degrades

The paper authored by ECE students of iVADER Lab.(Chunggi Lee, Yeonjun Kime, Dongmin Kim, advisor: Prof. Sungahn Ko), “A Visual Analytics System for Exploring, Monitoring, and Forecasting Road Traffic Congestion” has been accepted at IEEE Transaction on Visualization and Computer Graphics. This paper is invited for oral presentation at the forthcoming 2019 IEEE VIS, which

Time: 2019.6.5.(Wed) 4pm~   Location: 104 E204   Title: Common Mistakes in Academic Writing and 5 Ways to Avoid Them   Speaker: Daniel Croydon(UNIST Language Education Center)

Time: 2019.5.29.(wed) 4pm~   Location: 104 E204   Title: Topics in ML research – security and uncertainty   Speaker: Dr. Seong Joon Oh (LINE Plus Corp)

Time: 2019.5.23.(Thur) 2pm~    Location: 106 E203   Title: Leveraging Approximate Data and Sentinel Cells for Fast Read on NAND Flash   Speaker: Dr. Chun Jason Xue (City University of Hong Kong)

Authors: Jiyeon Han*, Kyowoon Lee* , Anh Tong, Jaesik Choi (corresponding author) (* contributed equally) Title: Confirmatory Bayesian Online Change Point Detection in the Covariance Structure of Gaussian Processes Conference: International Joint Conference on Artificial Intelligence (IJCAI 2019)  A research paper entitled “Confirmatory Bayesian Online Change Point Detection in the Covariance Structure of Gaussian Processes”

Heui In Yoon, who is a doctoral candidate within the School of Electrical and Computer Engineering at UNIST, is about to begin her new career as an expert in semiconductor integrated circuits layout design at Qualcomm, starting at the end of May, 2019. Ms. Yoon will receive her PhD degree in the month of August,

The paper authored by ECE graduate students of NEEDs Lab., E-San Jang (advisor: Prof. Kyung Rok Kim), “Record-High Performance Trantenna based on Asymmetric Nano-Ring FET for Polarization-Independent Large-Scale/Real-Time THz Imaging” has been accepted for presentation at the forthcoming 2019 VLSI Symposia on Technology and Circuits, which will be held in Kyoto, Japan. This VLSI symposium

Prof. Jeon’s paper titled “Analysis of Large-Scale Multi-Tenant GPU Clusters for DNN Training Workloads” has been accepted to USENIX ATC 2019. This work was done in collaboration with researchers at Microsoft in US and China. This paper presents an in-depth analysis on a multi-tenant GPU cluster running deep learning workloads, with discussion focused on efficiency

Dear ECE Student’s, This is Changjoo Oh, a staff member the scholl of ECE. We kindly request you to take a laboratory safety education till 5th May(Sun). Thank you for your cooperation. Please let me know if you have any further questions or help. Relation : Act on the establishment of safe laboratory environment code

– Authors : Anh Tong, Jaesik Choi (corresponding author) – Title: Discovering Latent Covariance Structures for Multiple Time Series – Conference :  International Conference on Machine Learning (ICML 2019) A research paper entitled “Discovering Latent Covariance Structures for Multiple Time Series” has been accepted to ICML(International Conference on Machine Learning) 2019. The paper is authored by Anh

ICSL’s paper, “A 0.5V-VIN, 0.29ps-Transient-FOM, and Sub-2mV-Accuracy Adaptive-Sampling Digital LDO Using Single-VCO-Based Edge-Racing Time Quantizer”, has been accepted for presentation at the forthcoming Symposium on VLSI Circuits 2019 which will be held in Kyoto, Japan. Symposium on VLSI Circuits is recognized as the top conference on semiconductor circuits, along with ISSCC (International Solid-State Circuits Conference).

Top